_____________________pin configurations/functional diagrams/truth tables _______________________________________________________________________________________ 1 part temp. range pin-package dg441 cj 0? to +70? 16 plastic dip dg441cy 0? to +70? 16 narrow so dg441c/d 0? to +70? dice* dg441dj -40? to +85? 16 plastic dip dg441dy -40? to +85? 16 narrow so dg441dk -40? to +85? 16 cerdip dg441ak -55? to +125? 16 cerdip** _______________general description maxim? redesigned dg441/DG442 analog switches now feature on-resistance matching (4 max) between switches and guaranteed on-resistance flatness over the signal range (9 max). these low on-resistance switches conduct equally well in either direction. they guarantee low charge injection (10pc max), low power consumption (1.65mw), and an esd tolerance of 2000v minimum per method 3015.7. the new design offers lower off-leakage current over temperature (less than 5na at +85?). the dg441/DG442 are quad, single-pole/single-throw (spst) analog switches. the dg441 has four normally closed switches, and the DG442 has four normally open switches. switching times are less than 250ns for t on and less than 70ns for t off . these devices operate from a sin- gle +10v to +30v supply, or bipolar ?.5v to ?0v sup- plies. maxim? improved dg441/DG442 continue to be fabricated with a 44v silicon-gate process. ________________________applications sample-and-hold circuits pbx, pabx communication systems guidance and control systems test equipment audio-signal routing battery-operated systems military radios heads-up displays modems fax machines ______________________new features ? plug-in upgrades for industry-standard dg441/DG442 ? improved rds(on) match between channels(4 max) ? guaranteed r flat(on) over signal range (9 max) ? improved charge injection (10pc max) ? improved off-leakage current over temperature (<5na at +85?) ? withstand electrostatic discharge (2000v min) per method 3015.7 __________________existing features ? low r ds(on) (85 max) ? single-supply operation +10v to +30v bipolar-supply operation ?.5v to ?0v ? low power consumption (1.65mw max) ? rail-to-rail signal handling ? ttl/cmos-logic compatible ______________ordering information improved, quad, spst analog switches 19-4611; rev 2; 7/96 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 in2 d2 s2 v+ v- s1 d1 in1 DG442 n.c. s3 d3 in3 in4 d4 s4 gnd dip/so dip/so DG442 logic switch 0 1 off on switches shown for logic ??input dg441 logic switch 0 1 on off 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 in2 d2 s2 v+ v- s1 d1 in1 dg441 n.c. s3 d3 in3 in4 d4 s4 gnd top view n.c. = not internally connected dg441/DG442 for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 ordering information continued on last page. * contact factory for dice specifications. ** contact factory for availability and processing to mil-std-883b.
2 _______________________________________________________________________________________ dg441/DG442 improved, quad, spst analog switches stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics?ual supplies (v+ = 15v, v- = -15v, gnd = 0v, v inh = 2.4v, v inl = 0.8v, t a = t min to t max , unless otherwise noted.) absolute maximum ratings voltage referenced to v- v+.........................................................................................44v gnd .....................................................................................25v v l ...................................................(gnd - 0.3v) to (v+ + 0.3v) digital inputs, v s , v d (note 1)......(v- - 2v) to (v+ + 2v) or 30ma (whichever occurs first) continuous current (any terminal) ......................................30ma peak current, s or d (pulsed at 1ms, 10% duty-cycle max) .................................100ma continuous power dissipation (t a = +70?) plastic dip (derate 10.53mw/? above +70?) ............842mw narrow so (derate 8.70mw/? above +70?) ..............696mw cerdip (derate 10.00mw/? above +70?) .................800mw operating temperature ranges dg441c/DG442c .................................................0? to +70? dg441d/DG442d ..............................................-40? to +85? dg441ak/DG442ak .......................................-65? to +150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10sec) .............................+300? v+ = 16.5v, v- = -16.5v, v d = ?5.5v, v s = ?5.5v -0.50 0.08 0.50 i d(on) or i s(on) v+ = 13.5v, v- = -13.5v, i s = -10ma, v d = 8.5v or -8.5v (note 3) v in = 0.8v v+ = 16.5v, v- = -16.5v, v d = 15.5v, v s = ?5.5v -.0.50 0.01 0.50 v+ = 16.5v, v- = -16.5v, v d = 15.5v, v s = ?5.5v -0.50 0.01 0.50 i d(off) drain off-leakage current (note 5) na v+ = 15v, v- = -15v, v d = ?0v, i s = -10ma 4 d r ds(on) on-resistance match between channels (note 4) v in = 2.4v conditions drain on-leakage current (note 5) na t a = +25? t a = t max a -20 20 na -500 0.01 500 i inl input current with input voltage low -5 5 t a = +25? t a = t max c, d na -500 0.01 500 i inh input current with input voltage high 5 50 85 r ds(on) drain-source on-resistance v -15 15 v analog analog-signal range i s(off) source off-leakage current (note 5) na -20 20 t a = +25? t a = t max c, d t a = +25? t a = t min to t max v+ = 15v, v- = -15v, v d = 5v or -5v, i s = -10ma 9 100 t a = +25? t a = t min to t max r flat(on) on-resistance flatness (note 4) 15 t a = +25? t a = t min to t max units min typ max (note 2) symbol parameter a -5 5 -20 20 a -10 10 c, d note 1: signals on s, d, or in exceeding v+ or v- are clamped by internal diodes. limit forward current to maximum current ratings. digital switch
dg441/DG442 improved, quad, spst analog switches _______________________________________________________________________________________ 3 t a = +25? t a = t min to t max t a = +25? all channels on or off, v+ = 16.5v, v- = -16.5v, v in = 0v or 5v t a = +25? f = 1mhz, figure 6 t a = +25? pf t a = +25? t a = +25? c l = 1nf, v gen = 0v, r gen = 0 , figure 3 all channels on or off, v+ = 16.5v, v- = -16.5v, v in = 0v or 5v t a = +25? all channels on or off, v+ = 16.5v, v- = -16.5v, v in = 0v or 5v conditions 110 170 q charge injection (note 3) pc 510 t a = +25? dg441, v d = ?0v, figure 2 ns 4 c d(off) drain off-capacitance pf 4 t a = +25? r l = 50 , c l = 5pf, f = 1mhz, figure 5 db 60 crosstalk (note 7) db -100 r l = 50 , c l = 5pf, f = 1mhz, figure 4 oirr off-isolation rejection ratio (note 6) f = 1mhz, figure 6 c s(off) source off-capacitance t a = +25? ? 15 100 i+ positive supply current v ?.5 ?0.0 v+, v- power-supply range 150 250 t off turn-off time ns 90 120 v s = ?0v, r l = 1k , figure 2 t on ? -1 -0.0001 1 i- negative supply current -5 5 turn-on time DG442, v d = ?0v, figure 2 ? -100 -15 i gnd ground current f = 1mhz, figure 6 c d(on) drain on-capacitance pf units min typ max (note 2) symbol parameter 16 electrical characteristics?ual supplies (continued) (v+ = 15v, v- = -15v, gnd = 0v, v inh = 2.4v, v inl = 0.8v, t a = t min to t max , unless otherwise noted.) supply dynamic
dg441/DG442 improved, quad, spst analog switches 4 _______________________________________________________________________________________ electrical characteristics?ingle supply (v+ = 12v, v- = 0v, gnd = 0v, v inh = 2.4v, v inl = 0.8v, t a = t min to t max , unless otherwise noted.) __________________________________________typical operating characteristics (t a = +25?, unless otherwise noted.) -15 0 15 -10 -5 510
on-leakage currents on-leakage (na) -2 -1 0 1 2 3 4 v s , v d (v) t a = +125? t a = +85? v+ = 15v
v- = -15v -15 0 15 -10 -5 510 off-leakage currents off-leakage (na) -1 0 2 1 v s , v d (v) t a = +85? t a = +125? v+ = 15v
v- = -15v switching threshold vs.
bipolar supply voltage v in (v) 0 0.5 1.5 2.0 2.5 3.0 3.5 ? ?0 ?5 ?0 bipolar supply voltage (v) max min note 2: typical values are for design aid only, are not guaranteed, and are not subject to production testing. the algebraic con- vention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. note 3: guaranteed by design. note 4: on-resistance match between channels and flatness is guaranteed only with bipolar-supply operation. flatness is defined as the difference between the maximum and the minimum value of on-resistance as measured at the extremes of the speci- fied analog range. note 5: leakage parameters i s(off) , i d(off) , and i d(on) are 100% tested at the maximum rated hot temperature and guaranteed by correlation at +25?. note 6: off-isolation rejection ratio = 20log (v d /v s ), v d = output, v s = input to off switch. note 7: between any two switches. t a = +25? t a = t min to t max ? (note 3) t a = +25? ? 15 100 all channels on or off, v in = 0v or 5v i+ t a = t min to t max positive supply current t a = +25? c l = 1nf, v gen = 0v ns v+ = 10.8v, v d = 3v, 8v, i s = 1.0ma 60 200 q charge injection (note 3) pc 510 conditions -5 5 v s = 8v, figure 2 t off turn-off time t a = +25? all channels on or off, v in = 0v or 5v v -100 -15 all channels on or off, v in = 0v or 5v i gnd ground current t a = +25? v 012 v analog analog signal range 10 30 i- negative supply current ? -1 -0.0001 1 v+ 100 160 r ds(on) drain-source on-resistance 200 power-supply range v s = 8v, figure 2 t on turn-on time ns units min typ max (note 2) symbol parameter 300 400 switch supply dynamic
dg441/DG442 improved, quad, spst analog switches _______________________________________________________________________________________ 5 ____________________________typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) on-resistance vs. v d and
unipolar supply voltage 0 25 50 75 100 125 150 175 200 225 250 0 5 10 15 20 v d (v) r ds(on) ( w ) v+ = 10v v+ = 15v v+ = 20v on-resistance vs. v d and unipolar supply voltage and temperature 0 25 50 75 100 125 150 r ds(on) ( w ) 04 812 v d (v) t a = +125? t a = +25? t a = -55? v+ = 12v
v- = 0v on-resistance vs. v d and
bipolar supply voltage r ds(on) ( w ) 30 60 90 120 150 180 -20 -10 0 +10 +20 v d (v) ?v ?0v ?5v ?0v 0 -15 0 15 -10 -5 510 on-resistance vs. v d and
bipolar voltage and temperature r ds(on) ( w ) 0 20 40 60 80 100 120 v d (v) t a = +125? t a = -55? t a = +25? v+ = 15v, v- = -15v
switching times vs.
bipolar supply voltage time (ns) 0 40 80 120 160 200 240 ? ?0 ?5 ?0 bipolar supply voltage (v) t on t off switching times vs.
unipolar supply voltage time (ns) 0 50 100 150 200 250 300 350 10 15 20 25 unipolar supply voltage (v) t on t off charge injection vs.
v d voltage (dual supply) q (pc) -20 0 20 40 v d (v) -15 -10 0 10 15 v+ = 15v
v- = -15v
c l = 1nf charge injection vs.
v d voltage (single supply) q (pc) -10 0 10 0 5 10 15 v d (v) v+ = 12v
v- = 0v
c l = 1nf
__________applications information operation with supply voltages other than ?5v using supply voltages other than ?5v reduces the analog signal range. the dg441/DG442 switches oper- ate with ?.5v to ?0v bipolar supplies or with a +10v to +30v single supply; connect v- to 0v when operating with a single supply. also, all device types can operate with unbalanced supplies such as +24v and -5v. the typical operating characteristics graphs show typical on-resistance with ?0v, ?5v, ?0v, and ?v sup- plies. (switching times increase by a factor of two or more for operation at ?v.) overvoltage protection proper power-supply sequencing is recommended for all cmos devices. do not exceed the absolute maxi- mum ratings because stresses beyond the listed rat- ings can cause permanent damage to the devices. always sequence v+ on first, followed by v- and logic inputs. if power-supply sequencing is not possible, add two small, external signal diodes in series with supply pins for overvoltage protection (figure 1). adding exter- nal diodes reduces the analog-signal range to 1v below v+ and 1v above v-, but low switch resistance and low leakage characteristics are unaffected. device operation is unchanged, and the difference between v+ and v- should not exceed +44v. _____________________pin description dg441/DG442 improved, quad, spst analog switches 6 _______________________________________________________________________________________ pin name function 1, 16, 9, 8 in1?n4 input 2, 15, 10, 7 d1?4 drain output 3, 14, 11, 6 s1?4 source output 4 v- negative supply voltage input 5 gnd ground 12 n.c. not internally connected 13 v+ positive supply voltage input. connected to substrate. v+ s v- d v g figure 1. overvoltage protection using external blocking diodes
dg441/DG442 improved, quad, spst analog switches _______________________________________________________________________________________ 7 t off 0.8 x v out v out 0.8 x v out t f < 20ns
t r < 20ns 50% 0v 0v +3v switch
output logic input waveform is inverted for switches
that have the opposite logic sense. t on switch
input logic
input
+3v in d +15v v+ v- -15v r l 35pf v out s c l (includes fixture and stray capacitance) gnd repeat test for channels 2, 3, and 4. v out = v d r l
r l + r ds(on) logic
input v d dg441
DG442 ( ) d v out off on off v out in in off off on q = d v out c l -15v v- v+ in gnd s +15v r gen v gen v in = +3v c l
1nf v out d dg441
DG442 dg441 DG442 figure 2. switching time figure 3. charge injection network
analyzer signal
generator r gen = 50 w s d gnd r l 10dbm 10nf v+ +15v in 0.8v or 2.4v v- -15v 10nf dg441
DG442 network
analyzer signal
generator r gen = 50 w 0.8v or 2.4v s in1 d gnd r l 10dbm 10nf v+ +15v d in2 s 0.8v or 2.4v 50 w v- -15v 10nf dg441
DG442 figure 4. off-isolation rejection ratio figure 5. crosstalk (repeat for channels 3 and 4) ______________________________________________timing diagrams/test circuits
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 8 ___________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1996 maxim integrated products printed usa is a registered trademark of maxim integrated products. dg441/DG442 improved, quad, spst analog switches part temp. range pin-package DG442 cj 0? to +70? 16 plastic dip DG442cy 0? to +70? 16 narrow so DG442c/d 0? to +70? dice* DG442dj -40? to +85? 16 plastic dip DG442dy -40? to +85? 16 narrow so DG442dk -40? to +85? 16 cerdip DG442ak -55? to +125? 16 cerdip** capacitance
meter d s gnd 10nf +15v in 0.8v or 2.4v v- -15v 10nf +v f = 1mhz ___________________chip topography __________________timing diagrams/ test circuits (continued) d3 d4 0.091"
(2.31mm) 0.071"
(1.80mm) v- gnd s4 in3 in4 s3 n.c. s2 v+ d1 in1 in2 d2 s1 figure 6. source/drain-on/off capacitance transistor count: 126 substrate connected to v+ _ordering information (continued) * contact factory for dice specifications. ** contact factory for availability and processing to mil-std-883b.
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